The present invention relates to technology which becomes effective when applied to threshold voltage adjustment technology in a semiconductor integrated circuit device (or a semiconductor device).
Japanese Patent Laid-Open No. 2009-135140 (Patent Document 1) or the corresponding US Patent Publication No. 2009-134468 (Patent Document 2) discloses technology to set a gate electrode material to one kind having a work function corresponding to a midgap and to provide an impurity region to adjust a threshold voltage in a back gate region of MISFET (Metal Insulator Semiconductor Field Effect Transistor) of an SOI part in a CMOS (Complementary Metal Oxide Semiconductor) or CMIS (Complementary Metal Insulator Semiconductor) semiconductor integrated circuit with a hybrid structure having an SOI (Silicon On Insulator) region and a bulk region.